A mixed-signal design roadmap
dc.contributor.author | Brederlow, R. | |
dc.contributor.author | Weber, W. | |
dc.contributor.author | Donnay, Stephane | |
dc.contributor.author | Wambacq, P. | |
dc.contributor.author | Sauerer, J. | |
dc.contributor.author | Vertregt, M. | |
dc.date.accessioned | 2021-10-14T16:38:57Z | |
dc.date.available | 2021-10-14T16:38:57Z | |
dc.date.issued | 2001 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/5096 | |
dc.source | IIOimport | |
dc.title | A mixed-signal design roadmap | |
dc.type | Journal article | |
dc.contributor.imecauthor | Donnay, Stephane | |
dc.contributor.orcidimec | Donnay, Stephane::0000-0003-2489-4793 | |
dc.source.peerreview | no | |
dc.source.beginpage | 34 | |
dc.source.endpage | 46 | |
dc.source.journal | IEEE Design & Test of Computers | |
dc.source.issue | 6 | |
dc.source.volume | 18 | |
imec.availability | Published - imec |
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