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Experimental determination of the maximum post-process annealing temperature for standard CMOS wafers

dc.contributor.authorSedky, Sherif
dc.contributor.authorWitvrouw, Ann
dc.contributor.authorBender, Hugo
dc.contributor.authorBaert, Kris
dc.date.accessioned2021-10-14T17:47:25Z
dc.date.available2021-10-14T17:47:25Z
dc.date.issued2001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5642
dc.sourceIIOimport
dc.titleExperimental determination of the maximum post-process annealing temperature for standard CMOS wafers
dc.typeJournal article
dc.contributor.imecauthorBender, Hugo
dc.source.peerreviewno
dc.source.beginpage377
dc.source.endpage385
dc.source.journalIEEE Trans. Electron Devices
dc.source.issue2
dc.source.volume48
imec.availabilityPublished - imec


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