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Thermal modeling and management in ultrathin chip stack technology

dc.contributor.authorPinel, S.
dc.contributor.authorMarty, A.
dc.contributor.authorTasselli, J.
dc.contributor.authorBailbe, J. P.
dc.contributor.authorBeyne, Eric
dc.contributor.authorVan Hoof, Rita
dc.contributor.authorMarco, S.
dc.contributor.authorMorante, J. R.
dc.contributor.authorVendier, O.
dc.contributor.authorHuan, M.
dc.date.accessioned2021-10-14T22:48:44Z
dc.date.available2021-10-14T22:48:44Z
dc.date.issued2002
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/6725
dc.sourceIIOimport
dc.titleThermal modeling and management in ultrathin chip stack technology
dc.typeJournal article
dc.contributor.imecauthorBeyne, Eric
dc.contributor.imecauthorVan Hoof, Rita
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.source.peerreviewno
dc.source.beginpage244
dc.source.endpage253
dc.source.journalIEEE Trans. Components and Packaging Technologies
dc.source.issue2
dc.source.volume25
imec.availabilityPublished - imec


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