High-level cache modeling for 2-D discrete wavelet transform implementations
dc.contributor.author | Andreopoulos, I. | |
dc.contributor.author | Schelkens, Peter | |
dc.contributor.author | Lafruit, Gauthier | |
dc.contributor.author | Masselos, K. | |
dc.contributor.author | Cornelis, Jan | |
dc.date.accessioned | 2021-10-15T03:58:50Z | |
dc.date.available | 2021-10-15T03:58:50Z | |
dc.date.issued | 2003 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/7136 | |
dc.source | IIOimport | |
dc.title | High-level cache modeling for 2-D discrete wavelet transform implementations | |
dc.type | Journal article | |
dc.contributor.imecauthor | Schelkens, Peter | |
dc.contributor.imecauthor | Cornelis, Jan | |
dc.contributor.orcidimec | Schelkens, Peter::0000-0003-0908-1655 | |
dc.source.peerreview | no | |
dc.source.beginpage | 209 | |
dc.source.endpage | 226 | |
dc.source.journal | Journal of VLSI Signal Processing | |
dc.source.issue | 3 | |
dc.source.volume | 34 | |
imec.availability | Published - imec |
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