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Modeling and optimization of hierarchical synchronous circuits

dc.contributor.authorLin, Bill
dc.contributor.authorDe Jong, Gjalt
dc.contributor.authorKolks, Tilman
dc.date.accessioned2021-09-29T13:09:34Z
dc.date.available2021-09-29T13:09:34Z
dc.date.issued1995
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/730
dc.sourceIIOimport
dc.titleModeling and optimization of hierarchical synchronous circuits
dc.typeProceedings paper
dc.source.peerreviewno
dc.source.beginpage144
dc.source.endpage149
dc.source.conferenceProceedings of the European Design and Test Conference. ED&TC 1995; March 6-9, 1995; Paris.
dc.source.conferencelocation
imec.availabilityPublished - imec


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