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A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits

dc.contributor.authorDambre, Joni
dc.contributor.authorVerplaetse, Peter
dc.contributor.authorStroobandt, Dirk
dc.contributor.authorVan Campenhout, Jan
dc.date.accessioned2021-10-15T04:15:10Z
dc.date.available2021-10-15T04:15:10Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7378
dc.sourceIIOimport
dc.titleA comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits
dc.typeJournal article
dc.contributor.imecauthorDambre, Joni
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage24
dc.source.endpage34
dc.source.journalIEEE Trans. Very Large Scale Integration (VLSI) Systems
dc.source.issue1
dc.source.volume11
imec.availabilityPublished - open access


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