In-line electrical metrology for high-k gate dielectrics deposited by atomic layer CVD
dc.contributor.author | De Witte, Hilde | |
dc.contributor.author | Passefort, Sophie | |
dc.contributor.author | Besling, Wim | |
dc.contributor.author | Maes, Jan | |
dc.contributor.author | Eason, K. | |
dc.contributor.author | Young, Edward | |
dc.contributor.author | Rittersma, Chris | |
dc.contributor.author | Heyns, Marc | |
dc.date.accessioned | 2021-10-15T04:24:55Z | |
dc.date.available | 2021-10-15T04:24:55Z | |
dc.date.issued | 2003 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/7459 | |
dc.source | IIOimport | |
dc.title | In-line electrical metrology for high-k gate dielectrics deposited by atomic layer CVD | |
dc.type | Journal article | |
dc.contributor.imecauthor | Maes, Jan | |
dc.contributor.imecauthor | Heyns, Marc | |
dc.source.peerreview | no | |
dc.source.beginpage | F169 | |
dc.source.endpage | F172 | |
dc.source.journal | Journal of the Electrochemical Society | |
dc.source.issue | 9 | |
dc.source.volume | 150 | |
imec.availability | Published - imec |
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