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dc.contributor.authorKaczer, Ben
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-15T05:06:26Z
dc.date.available2021-10-15T05:06:26Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7717
dc.sourceIIOimport
dc.titlePotential vulnerability of dynamic CMOS logic to soft gate oxide breakdown
dc.typeJournal article
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.source.peerreviewno
dc.source.beginpage742
dc.source.endpage744
dc.source.journalIEEE Electron Devices Letters
dc.source.issue12
dc.source.volume24
imec.availabilityPublished - imec


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