Gate-level characterization and reduction of substrate noise in digital integrated circuits
dc.contributor.author | Badaroglu, Mustafa | |
dc.date.accessioned | 2021-10-15T12:39:41Z | |
dc.date.available | 2021-10-15T12:39:41Z | |
dc.date.issued | 2004-09 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/8505 | |
dc.source | IIOimport | |
dc.title | Gate-level characterization and reduction of substrate noise in digital integrated circuits | |
dc.type | PHD thesis | |
dc.contributor.imecauthor | Badaroglu, Mustafa | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | no | |
dc.contributor.thesisadvisor | De Man, Hugo | |
dc.contributor.thesisadvisor | Gielen, Georges | |
imec.availability | Published - open access |