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Wafer-level packaging technology for hig-Q on-chip inductors and transmission lines

dc.contributor.authorCarchon, Geert
dc.contributor.authorDe Raedt, Walter
dc.contributor.authorBeyne, Eric
dc.date.accessioned2021-10-15T12:49:30Z
dc.date.available2021-10-15T12:49:30Z
dc.date.issued2004
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8656
dc.sourceIIOimport
dc.titleWafer-level packaging technology for hig-Q on-chip inductors and transmission lines
dc.typeJournal article
dc.contributor.imecauthorDe Raedt, Walter
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecDe Raedt, Walter::0000-0002-7117-7976
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.source.peerreviewno
dc.source.beginpage1244
dc.source.endpage1251
dc.source.journalIEEE Trans. Microwave Theory and Techniques
dc.source.issue4
dc.source.volume52
imec.availabilityPublished - imec


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