Browsing by Author "Ackaert, J."

Now showing 1 - 5 of 5

Antenna test structure matrix description, application for optimized HDP oxide deposition, metal etch, Ar preclean and passivation processing in sub-half micron CMOS processing

Ackaert, J.
;
de Backer, E.
;
Coppens, P.
;
Creusen, Martin
Oral presentation
1999, 1st European Symposium on Plasma Process Induced Damage (ESPID'1); 25-26 November 1999; Toulouse, France.
Correlation between hot carrier stress, oxide breakdown and gate leakage current for monitoring plasma processing induced damage on gate oxide

Zhichun, Wang
;
Ackaert, J.
;
Salm, C.
;
de Backer, E.
;
Van den Bosch, Geert
;
Zawalski, Wade
Proceedings paper
2002, Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits - IPFA, 8/07/2002, p.242-245
Impact of plasma density and pattern aspect ratio on plasma damage in deep submicron CMOS technologies

Creusen, Martin
;
Van den bosch, G.
;
van der Groen, Sonja
;
Groeseneken, Guido
;
Ackaert, J.
Proceedings paper
1999, ESSDERC'99 - Proceedings of the 29th European Solid-State Device Research Conference; 13-15 September 1999; Leuven, Belgium., p.164-167
Impact of reactor- and transistor-type on electron shading

Creusen, Martin
;
Ackaert, J.
;
De Backer, E.
;
Groeseneken, Guido
Proceedings paper
1999, Proceedings 1999 International Symposium on Plasma Process-Induced Damage - P2ID, 09/05/1999, p.8-11
Plasma damage in HIMOSTM non-volatile memories (NVM)

Ackaert, J.
;
Lowe, A.
;
De Backer, E.
;
Boonen, S.
;
Yao, T.
;
Van Houdt, Jan
;
Haspeslagh, Luc
Proceedings paper
2004-05, IEEE International Conference on Integrated Circuit Design and Technology - ICICDT, 17/05/2004, p.223-226