Browsing by Author "Brockmeyer, Erik"
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Publication A memory hierarchical layer assigning and prefetching technique to overcome the memory performance/energy bottleneck
Proceedings paper2005, Proceedings of the Design, Automation and Test in Europe Conference and Exhibition - DATE, 7/03/2005, p.946-947Publication Alleviating memory bottlenecks by software-controlled data transfers in a data-parallel wavelet transform on a multicore DSP
Proceedings paper2005, Proceedings 1st Annual IEEE BENELUX/DSP Valley Signal Processing Symposium - SPS-DARTS, 19/04/2005, p.143-146Publication An automatic scratch pad memory management tool and MPEG-4 encoder case study
Proceedings paper2008, 45th Design Automation Conference - DAC, 9/06/2008, p.201-204Publication Augmenting the exploration space for global loop transformations by systematic preprocessing of data dependent constructs
Proceedings paper2004, Program Acceleration through Application and Architecture driven Code Transformations - PA3CT, 16/09/2004, p.33-35Publication Background data organisation exploration for the low-power implementation in real-time of a digital audio broadcast receiver on a SIMD processor
Proceedings paper2003, Design, Automation and Test in Europe Conference and Exhibition - DATE, 3/03/2003, p.1144-1145Publication Code transformations for reduced data transfer and storage in low power realisations of MPEG-4 full-pel motion estimation
Proceedings paper1998, Proceedings International Conference on Image Processing - ICIP, 4/10/1998, p.985-89Publication Code transformations for reduced data transfer and storage in low power realization of DAB synchro ore
Proceedings paper1999, Proceedings IEEE Workshop on Power and Timing Modeling, Optimization and Simulation - PATMOS '99; October 1999; Kos, Greece., p.51-60Publication Cost efficient system design for embedded multi-media
; Brockmeyer, ErikOral presentation2000, 3rd International Workshop of the European Low Power Initiative for Electronic System Design - ESDLPDPublication Data and memory optimization techniques for embedded systems
Journal article2001, ACM Transactions on Design Automation of Electronic Systems, (6) 2, p.149-206Publication Data memory organization and optimizations in application-specific systems
Journal article2001, IEEE Design & Test of Computers, (18) 3, p.56-68Publication Data reuse analysis technique for software-controlled memory hierarchies
;Issenin, Ilya ;Brockmeyer, Erik ;Miranda, MiguelDutt, Nikil DuttProceedings paper2004-02, Proceedings Design, Automation and Test in Europe Conference and Exhibition, 16/02/2004, p.202-207Publication Data transfer and storage exploration for real-time implementation of a digital audio broadcast receiver on a trimedia processor
Proceedings paper2002, Symposium on Integrated Circuit and System Design - SBCCI, 9/09/2002, p.373-378Publication Data-reuse-driven energy-aware cosynthesis of scratch pad memory and hierarchical bus-based communication architecture for multiprocessor streaming applications
;Issenin, Ilya ;Brockmeyer, Erik ;Durinck, BartDutt, NikilJournal article2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (27) 8, p.1439-1452Publication Design and tool flow of multimedia MPSoC platforms
Journal article2009, Journal of Signal Processing Systems, (57) 2, p.229-247Publication Design-time application exploration for MP-SoC customized run-time management
Proceedings paper2005, Proceedings International Symposium on System-on-Chip, 15/11/2005, p.66-69Publication Design-time application mapping and platform exploration for MP-SoC customized run-time management
Journal article2007-03, IEE Proceedings Computers & Digital Techniques, (1) 2, p.120-128Publication DRDU: a data reuse analysis technique for efficient scratch pad memory management
;Issenin, Ilya ;Brockmeyer, Erik ;Miranda Corbalan, MiguelDutt, NikilJournal article2007-04, ACM Transactions on Design Automation of Electronic Systems (TODAES), (12) 2, p.article 15Publication Energy efficient memory architecture for high speed decoding of block turbo-codes with the Fang-Buda algorithm
Journal article2005-01, Journal of VLSI Signal Processing, (39) 1_2, p.79-92
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