Browsing by Author "Chen, Jie-Ting"
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Publication Interconnect Capacitance Investigation and Optimization Under I/O Pad for ESD Protection of RF/High Speed Circuits in Micro- & Nano-scale CMOS Technology
Proceedings paper2020, 2020 International ESD Workshop (IEW), 4/05/2020Publication RF/high-speed I/O ESD protection: Co-optimizing strategy between BEOL capacitance and HBM immunity in advanced CMOS process
Journal article2020, IEEE Transactions on Electron Devices, (67) 7, p.2752-2759