Browsing by Author "Couvreur, Aissa"
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Publication A 200Mbps+ 2.14nJ/b digital baseband multi processor system-on-chip for SDRs
Proceedings paper2009, Symposium on VLSI Circuits, 16/06/2009, p.292-293Publication A 48-dB DR 80-MHz BW 8.88-GS/s bandpass delta-sigma ADC for RF digitization with integrated PLL and polyphase decimation filter in 40nm CMOS
Proceedings paper2011, Symposium on VLSI Circuits, 13/06/2011, p.40-41Publication Algorithm-architecture co-optimization of area-efficient SDR baseband for highly diversified digital TV standards
Proceedings paper2012, IEEE 75th Vehicular Technology Conference - VTCSpring, 6/05/2012, p.1-5Publication Implementation of a flexible, low power and high performance 4G baseband processor with the Cadence CPF flow
Oral presentation2012, CDNLive EMEAPublication RF-to-baseband digitization in 40nm CMOS with RF bandpass delta-sigma modulator and polyphase decimation filter
Journal article2012, IEEE Journal of Solid-State Circuits, (47) 4, p.990-1002