Browsing by Author "De Sutter, Bjorn"
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Publication A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots
Proceedings paper2007-09, International Conference on Compilers, Architecture and Synthesis for Embedded Systems - CASES, 30/09/2007, p.229-237Publication A coarse-grained array accelerator for software-defined radio baseband processing
Journal article2008, IEEE Micro, (28) 4, p.41-50Publication A coarse-grained array based baseband processor for 100Mbps+ software defined radio
;Bougard, Bruno ;De Sutter, Bjorn ;Rabou, Sebastien ;Novo Bruna, DavidAllam, OsmanProceedings paper2008-03, Design, Automation and Test in Europe Conference - DATE, 10/03/2008, p.716-721Publication An efficient memory organization for high-ILP inner modem baseband SDR processors
Journal article2010, Journal of Signal Processing Systems, (61) 2, p.157-179Publication Architecture enhancements for the ADRES coarse-grained reconfigurable array
;Bouwens, Frank ;Berekovic, Mladen ;Gaydadjiev, GeorgiDe Sutter, BjornProceedings paper2008, High Performance Embedded Architectures and Compilers. 3rd International Conference - HiPEAC, 27/01/2008, p.66-81Publication Compilation techniques for CGRAs: exploring all parallelization approaches
Proceedings paper2010-10, 8th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Synthesis - CODES-ISSS, 24/10/2010, p.185-186Publication Design and tool flow of multimedia MPSoC platforms
Journal article2009, Journal of Signal Processing Systems, (57) 2, p.229-247Publication Implementation of a coarse-grained reconfigurable media processor for AVC decoder
Journal article2008, Journal of VLSI Signal Processing Systems, (51) 3, p.225-243Publication Mapping of nomadic multimedia applications on the ADRES reconfigurable array processor
;Berekovic, M. ;Kanstein, A. ;Mei, BingfengDe Sutter, BjornJournal article2009, Microprocessors and Microsystems, (33) 4, p.290-294Publication Optimizing coarse-grain reconfigurable hardware utilization through multiprocessing: an H.264/AVC decoder example
;Kanstein, Andreas ;Lopez Suarez, SebastianDe Sutter, BjornProceedings paper2007, VLSI Circuits and Systems III, 2/05/2007, p.65900CPublication Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays
Proceedings paper2008, ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems - LCTES, 12/06/2008, p.151-160Publication Sharing is Caring: Secure and Efficient Shared Memory Support for MVEEs
;Vinck, Jonas ;Abrath, Bert ;Coppens, Bart ;Voulimeneas, AlexiosDe Sutter, BjornProceedings paper2022, 17th European Conference on Computer Systems (EuroSys), APR 05-08, 2022, p.99-116Publication Still image processing on coarse-grained reconfigurable array architectures
Proceedings paper2007-10, IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia - ESTIMedia, 4/10/2007, p.67-72Publication Still image processing on coarse-grained reconfigurable array architectures
Journal article2010, Journal of Signal Processing Systems, 60, p.225-237