Browsing by Author "Devadas, S."

A methodology for efficient estimation of switching activity in sequential logic circuits

Event-Based Verification of Synchronous, Globally Controlled, Logic Designs Against Signal Flow Graphs

Performance-driven synthesis of asynchronous controllers

Power estimation methods for sequential logic circuits

Synthesis of hazard-free multi-level logic under multiple-input changes from binary decision diagrams

Synthesis of hazard-free multilevel logic under multiple-input changes from binary decision diagrams