Browsing by Author "Facchini, Marco"
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Publication 3D IO interface design between memory and logic dies on TSV interconnects
Proceedings paper2009, HPCA-15 / Workshop on 3D Integration and Interconnection-Centric Architectures, 14/02/2009Publication An RDL-configurable 3D memory tier to replace on-chip SRAM
Proceedings paper2010, Design, Automation and Test in Europe Conference - DATE, 8/03/2010, p.291-294Publication Design challenges and solutions for memory organization using 3D-integrated circuit technology
Facchini, MarcoPHD thesis2011-09Publication Stackable memory of 3D chip integration for mobile applications
Publication System-level power/performance evaluation of 3D stacked DRAMs for mobile applications
Proceedings paper2009, Design, Automation and Test in Europe Conference - DATE, 20/04/2009, p.923-928