Browsing by Author "Hemaram, Surendra"
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Publication Asymmetric and Adaptive Error Correction in STT-MRAM
Journal article2025, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, (44) 9, p.3336-3349Publication Hard Error Correction in STT-MRAM
Proceedings paper2024, 29th Asia and South Pacific Design Automation Conference (ASP-DAC), JAN 22-25, 2024, p.752-757Publication InterA-ECC: Interconnect-Aware Error Correction in STT-MRAM
Proceedings paper2025, 2025 Design, Automation & Test in Europe Conference-DATE, 2025-03-31, p.1-2Publication Soft and Hard Error-Correction Techniques in STT-MRAM
Journal article2024, IEEE DESIGN & TEST, (41) 5, p.65-82