Browsing by Author "Hendricx, Stefan"

Now showing 1 - 4 of 4

A symbolic core approach to the formal verification of integrated mixed-mode applications

Hendricx, Stefan
;
Claesen, Luc
Proceedings paper
1997, European Design & Test Conference - ED&TC, 17/03/1997, p.432-436
Formally verified redundancy removal

Hendricx, Stefan
;
Claesen, Luc
Proceedings paper
1999, Proceedings Design, Automation and Test in Europe Conference; 9-12 March 1999; München, Germany., p.150-156
Symbolic multi-level verification of refinement

Hendricx, Stefan
;
Claesen, Luc
Proceedings paper
1999, Proceedings 9th Great Lakes Symposium on VLSI; 4-6 March 1999; Ypsilanti, MI, USA., p.288-291
Verification of finite-state-machine refinements using a symbolic technology

Hendricx, Stefan
;
Claesen, Luc
Proceedings paper
1999, Correct Hardware Design and Verification Methods. Proceedings10th IFIP WG10.5 Advanced Research Working Conference, CHARME'99., p.326-329