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Browsing by Author "Iriguchi, Masao"

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    A 1.7mW 11b 250MS/s 2-times interleaved fully dynamic pipelined SAR ADC in 40nm digital CMOS

    Verbruggen, Bob
    ;
    Iriguchi, Masao
    ;
    Craninckx, Jan  
    Journal article
    2012, IEEE Journal of Solid-State Circuits, (47) 12, p.2880-2887
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    A 2.1 mW 11b 410 MS/s dynamic pipelined SAR ADC with background calibrationn in 28nm digital CMOS

    Verbruggen, Bob
    ;
    Iriguchi, Masao
    ;
    de la Guia, Manuel
    ;
    Glorieux, Guy  
    ;
    Deguchi, Kazuaki
    ;
    Malki, Badr
    Proceedings paper
    2013, Symposium on VLSI Circuits, 11/06/2013, p.C268-C269
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    A 60 dB SNDR 35 MS/s SAR ADC with comparator-noise-based stochastic residue estimation

    Verbruggen, Bob
    ;
    Tsouhlarakis, Jorgo  
    ;
    Yamamoto, Takaya
    ;
    Iriguchi, Masao
    ;
    Martens, Ewout  
    Journal article
    2015, IEEE Journal of Solid-State Circuits, (50) 9, p.2002-2011
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    A complementary dynamic residue amplifier for a 67 dB SNDR 1.36 mW 170 MS/s pipelined SAR ADC

    Malki, Badr
    ;
    Verbruggen, Bob
    ;
    Wambacq, Piet  
    ;
    Deguchi, Kazuaki
    ;
    Iriguchi, Masao
    ;
    Craninckx, Jan  
    Proceedings paper
    2014, 40th European Solid-State Circuits Conference - ESSCIRC, 22/09/2014, p.215-218

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