Browsing by Author "Kükner, Halil"
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Publication 3.5T CFET Block-Level DTCO for Superior PPA in A7 Node by Split Power, hDR Cells, Optimized Pins and BEOL
Proceedings paper2025, IEEE International Electron Devices Meeting (IEDM), 2025-12-06Publication Double-Row CFET: Design Technology Co-Optimization for Area Efficient A7 Technology Node
; ; ; ; ; Proceedings paper2024, IEEE International Electron Devices Meeting (IEDM), 2024-12-07Publication High-Density Standard Cell Libraries with Backside Power Options in A14 Nanosheet Node
Proceedings paper2024, Conference on DTCO and Computational Patterning III, FEB 26-29, 2024, p.1295409Publication Managing Crosstalk in multi-GHz Front Side Clock for Back Side Power enabled Sub-2nm 2D/3D ICs
Proceedings paper2024, IEEE International Conference on IC Design and Technology (ICICDT), SEP 25-27, 2024Publication Multi-node scaling potential of monolithic CFET
Proceedings paper2025, IEEE International Electron Devices Meeting (IEDM), 2025-12-06Publication System technology co-optimization of cost-bandwidth tradeoffs in Network on Chip through 3D integration and backside signals
Proceedings paper2024, IEEE International Electron Devices Meeting (IEDM), 2024-12-07Publication Thermal Performance Evaluation of Multi-core SOCs Using Power-Thermal Co-simulation
Proceedings paper2024, International Reliability Physics Symposium (IRPS), 2024-04-14