Browsing by Author "Leonelli, Daniele"
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Publication A 35nm diameter vertical silicon nanowire short-gate tunnelFET
Proceedings paper2009, Nanotechnology Workshop, 13/06/2009Publication Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction tunnel-FETs
Journal article2013, Solid-State Electronics, 83, p.50-55Publication Boosting the on-current of Si-based tunnel field-effect transistors
Proceedings paper2010, SiGe, Ge, and Related Compounds 4: Materials, Processing and Devices, 10/10/2010, p.363-372Publication Boosting the on-current of Si-based tunnel field-effect transistors
Meeting abstract2010, 218th ECS Meeting, 10/10/2010, p.1893Publication Drain voltage dependent analytical model of tunnel field-effect transistors
Journal article2011, Journal of Applied Physics, (110) 2, p.24510Publication Drive current enhancement in p-tunnel FETs by optimization of the process conditions
Journal article2011, Solid-State Electronics, 65-66, p.28-32Publication Drive current improvement in Si tunnel field effect transistors by means of silicide engineering
Proceedings paper2010, International Conference on Solid State Devices and Materials - SSDM, 22/09/2010, p.693-694Publication Electrical results of vertical Si N-tunnel FETs
Proceedings paper2011-09, 41st European Solid-State Device Research Conference - ESSDERC, 12/09/2011, p.255-258Publication Experimental analog performance of pTFETs as a function of temperature
Proceedings paper2012, IEEE International SOI Conference, 1/10/2012, p.4.8Publication Exploration of Scandium Doping in Sb2Te3 for Phase Change Memory Application
Journal article2022-11, IEEE TRANSACTIONS ON ELECTRON DEVICES, (69) 11, p.6106-6112Publication Fabrication and analysis of a Si/Si0.55Ge0.45 hetero-junction line tunnel FET
Journal article2014, IEEE Transactions on Electron Devices, (61) 3, p.707-715Publication Fabrication and characterization of Si and hetero-junction tunnel field effect transistors
Oral presentation2009, Global COE International Symposium Silicon Nano Devices in 2030: Prospects by World's Leading ScientistsPublication Ge and III/V devices on Si for advanced CMOS
Meeting abstract2009, 5th Handai Nanoscience and Nanotechnology International Symposium, 1/09/2009Publication Hetero Ge/SI and Si1-xGex/Si nanowires for vertical microelectronics devices
Proceedings paper2009, 19th Symposium of MRS-Japan, 7/12/2009Publication High mobility channel materials and novel devices for scaling of nanoelectronics beyond the Si roadmap
Proceedings paper2009, High-k Dielectrics on Semiconductors with High Carrier Mobility, 30/11/2009, p.1194-A07-01Publication Impact of process and geometrical parameters on the electrical characteristics of vertical nanowire silicon n-TFETs
Journal article2012, Solid-State Electronics, 72, p.82-87Publication Modeling the single-gate, double-gate and gate-all-around tunnel field-effect transistor
Journal article2010, Journal of Applied Physics, (107) 2, p.24518Publication Multiple-gate tunneling field effect transistors with sub-60mV/dec subthreshold slope
Proceedings paper2009, Extended Abstracts Solid State Devices and Materials Conference - SSDM, 7/10/2009, p.767-768Publication Novel architecture to boost the vertical tunneling in tunnel field effect transistors
Proceedings paper2011, IEEE International SOI Conference, 3/10/2011