Browsing by Author "Lu, Zhichao"
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Publication A novel low-voltage biasing scheme for double gate FBC achieving 5s retention and 10^16 endurance at 85°C
Proceedings paper2010, IEEE International Elecrton Devices Meeting - IEDM, 6/12/2010, p.288-291Publication BJT mode endurance on a 1T-RAM bulk FinFET device
; ; ; Journal article2010, IEEE Electron Device Letters, (31) 12, p.1380-1382Publication Realizing super-steep subthreshold slope with conventional FDSOI CMOS at low-bias voltages
Proceedings paper2010, IEEE International Electron Devices Meeting - IEDM, 6/12/2010, p.407-410