Browsing by Author "Ramon, Hannes"

4-channel 200 Gb/s WDM O-band silicon photonic transceiver sub-assembly

400 Gb/s silicon photonic transmitter and routing WDM technologies for glueless 8-socket Chip-to-Chip interconnects

50 GBd PAM4 transmitter with a 55nm SiGe BiCMOS driver and silicon photonic segmented MZM

52 km-long transmission link using a 50 Gb/s O-band silicon microring modulator co-packaged with a 1V-CMOS driver

53 GBd PAM-4 DAC-less low-power (1.5 pJ/b) silicon integrated transmitter

56-Gb/s silicon optical receiver using a low-noise fully-differential transimpedance amplifier in SiGe BiCMOS

70 Gb/s 0.87 pJ/bit GeSi EAM driver in 55 nm SiGe BiCMOS

70 Gb/s low-power DC-coupled NRZ differential electro-absorption modulator driver in 55 nm SiGe BiCMOS

90 Gb/s NRZ optical receiver in silicon using a fully-differential transimpedance amplifier

A 1.8 pJ/b, 12.5--25 Gb/s wide range all-digital clock and data recovery circuit

A 100-GS/s Four-to-One Analog Time Interleaver in 55-nm SiGe BiCMOS

A 106-Gb/s PAM-4 silicon optical receiver

A 160Gb/s (4x40) WDM O-band Tx subassembly using a 4-ch array of slicon rings co-packaged with a SiGe BiCMOS IC driver

A 25 Gb/s all-digital clock and data recovery circuit for burst mode applications in PONs

A 25 Gb/s all-digital clock and data recovery circuit for burst mode applications in PONs

A 4-to-1 240 Gb/s PAM-4 MUX with a 7-tap Mixed-Signal FFE in 55nm BiCMOS

A 6-bit 56-GSa/s DAC in 55 nm SiGe BiCMOS

A 700mW 4-to-1 SiGe BiCMOS 100GS/s analog time-interleaver

A DC-coupled 50 Gb/s 0.064 pJ/bit thin-oxide level shifter in 28 nm FDSOI CMOS

Adaptive patterning of optical and electrical fan-out for photonic chip packaging