Browsing by Author "Van der Perre, Liesbet"
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Publication 2D vs 3D integration: Architecture-technology co-design for future mobile MPSoC platforms
Proceedings paper2014, IEEE International Interconnect Technology Conference - IITC, 20/05/2014, p.381-384Publication <30 MW rectangular-to-polar conversion processor in 802.11AD polar transmitter
Proceedings paper2015, 40th International Conference on Acoustics, Speech and Signal Processing - ICASSP, 19/04/2015, p.1022-1026Publication 80 MB/s QPSK and 72Mb/s 64-QAM, flexible and scalable digital OFDM tranceiver ASICs for wireless local area networks in the 5GHz band
Journal article2001, IEEE Journal of Solid-State Circuits, (36) 11, p.1829-1838Publication A 10.37 mm2 675 mW reconfigurable LDPC and Turbo encoder and decoder for 802.11n, 802.16e and 3GPP-LTE
Proceedings paper2010, Symposium on VLSI Circuits, 16/06/2010, p.213-214Publication A 2.4GHz 40mW 40dB SNDR/62dB SFDR 60MHz bandwidth mirrored-image RF bandpass \Sigma \Delta ADC in 90nm CMOS
Proceedings paper2008-11, IEEE Asian Solid-State Conference - ASSCC, 3/11/2008, p.361-364Publication A 200Mbps+ 2.14nJ/b digital baseband multi processor system-on-chip for SDRs
Proceedings paper2009, Symposium on VLSI Circuits, 16/06/2009, p.292-293Publication A 22 mW multi-standard reconfigurable spectrum sensing enabled digital frontend
Proceedings paper2012-10, IEEE Workshop on Signal Processing Systems - SiPS, 17/10/2012Publication A 28 nm CMOS 7.04 Gsps polar digital front-end processor for 60 GHz transmitter
; ; ; Proceedings paper2016, IEEE Asian Solid-State Circuits Conference - A-SSCC, 8/11/2016, p.333-336Publication A 80 Mb/s low-power scalable turbo coded core
Proceedings paper2002, Proceedings IEEE Custom Integrated Circuits Conference, 12/05/2002, p.389-392Publication A class of power-efficient VLSI architectures for high-speed turbo-decoding
Proceedings paper2002, Proceedings IEEE Global Telecommunications Conference - Globecom, 17/11/2002, p.549-553Publication A coarse-grained array accelerator for software-defined radio baseband processing
Journal article2008, IEEE Micro, (28) 4, p.41-50Publication A coarse-grained array based baseband processor for 100Mbps+ software defined radio
Publication A combined OFDM/SDMA approach
Journal article2000, IEEE J. Selected Areas in Communications, (18) 11, p.2312-2321Publication A computationally efficient soft-output lattice reduction-aided selective spanning sphere decoder for wireless MIMO systems
Proceedings paper2013, IEEE Conference on Personal Indoor and Mobile Radio Communications - PIMRC, 9/09/2013, p.786-790Publication A cycle accurate NoC simulation framework for early phase exploration of SDR platforms
Publication A digital 72Mb/s 64-QAM OFDM tranceiver for 5GHz wireless LAN in 0.18μm CMOS
Proceedings paper2001, IEEE International Solid-State Circuits Conference - ISSCC. Digest of Technical Papers, 4/02/2001, p.336-337, 462-463Publication A digital 80Mb/s OFDM transceiver IC for wireless LAN in 5GHz band
Proceedings paper2000, IEEE International Solid-State Circuits Conference - ISSCC, 7/02/2000, p.74-75Publication A distributed multichannel MAC protocol for cognitive radio networks with primary user recognition
Proceedings paper2007, 2nd International Conference on Cognitive Radio Oriented Wireless Networks and Communications - CrownCom, 1/08/2007Publication A distributed multichannel MAC protocol for multihop cognitive radio networks
Journal article2010, IEEE Transactions on Vehicular Technology, (59) 1, p.446-459Publication A flexible architecture for future wireless local area networks
Oral presentation1998, International Conference on Telecommunications; June 1998; Chalkidiki, Greece.