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Browsing by Author "Vanthournout, Bart"

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    2PARMA: Parallel paradigms and run-time management techniques for many-core architectures

    Silvano, Cristina
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    Fornaciari, William
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    Siorpaes, David
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    Stabernack, Benno
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    Couvreur, Chantal
    Oral presentation
    2011, DATE Workshop on Designing for Embedded Parallel Computing Platforms
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    High-level performance estimation using simulators at multiple abstraction levels

    Avasare, Prabhat
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    Vanmeerbeeck, Geert  
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    Wouters, Maryse  
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    Vanthournout, Bart
    Oral presentation
    2009, DATE Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications
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    MOSART: Mapping Optimisation for Scalable multi-core ARchiTecture

    Candaele, Bernard
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    Jantsch, Axel
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    Ashby, Tom  
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    Tiensyrjä, Kari
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    Ieromnimon, Frank
    Proceedings paper
    2008, 16th IFIP/IEEE International Conference on Very Large Scale Integration - VLSI-SoC, 13/10/2008, p.343-344
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    Synthesis of pipelined DSP accelerators with dynamic scheduling

    Schaumont, Patrick
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    Vanthournout, Bart
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    Bolsens, Ivo
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    De Man, Hugo  
    Journal article
    1997, IEEE Trans. Very Large Scale Integration (VLSI) Systems, (5) 1, p.59-68
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    Synthesis of pipelined DSP accelerators with dynamic scheduling

    Schaumont, Patrick
    ;
    Vanthournout, Bart
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    Bolsens, Ivo
    ;
    De Man, Hugo  
    Proceedings paper
    1995, Proceedings of the 8th International Symposium on System Synthesis; 13-15 Sept. 1995; Cannes, France., 13/09/1995, p.72-77

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