Browsing by Author "Vaysset, Adrien"
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Publication Area and routing efficiency of SWD circuits compared to advanced CMOS
Proceedings paper2015, International Conference on IC Design and Technology - ICICDT, 1/06/2015, p.1-4Publication Chain of magnetic tunnel junctions as a spintronic memristor
Journal article2018, Journal of Applied Physics, (124) 15, p.152116Publication Control of interlayer exchange coupling and its impact on spin-torque switching of hybrid free layers with perpendicular magnetic anisotropy
Proceedings paper2017, IEEE International Magnetics Conference - INTERMAG, 23/04/2017, p.1-2Publication Control of interlayer exchange coupling and its impact on spin-torque switching of hybrid free layers with perpendicular magnetic anisotropy
Journal article2017, IEEE Transactions on Magnetics, (53) 11, p.3401305Publication Design and benchmarking of hybrid CMOS-spin wave device circuits compared to 10nm CMOS
Proceedings paper2015, IEEE 15th International Conference on Nanotechnology - IEEE-NANO, 27/07/2015Publication Electrical switching properties in asymmetric MTJs for logic applications
Meeting abstract2017, 62nd Annual Conference on Magnetism and Magnetic Materials - MMM, 6/11/2017, p.EC-11Publication Eliminating incubation delay time in spin-transfer torque magnetic random-access memory using the spin-Hall effect
Journal article2014, Applied Physics Letters, (104) 1, p.12403Publication Fabrication of magnetic tunnel junctions connected through a continuous free layer to enable spin logic devices
Journal article2018, Japanese Journal of Applied Physics, (57) 4S, p.04FN01Publication Heterogeneous nano- to wide-scale co-integration of beyond-Si and Si CMOS devices to enhance future electronics
Proceedings paper2015, Silicon Compatible Materials, and Technologies for Advanced Integrated Processes, Circuits and Emerging Applications 5, 29/06/2015, p.3-14Publication Instant MTJ switching for logic applications
Meeting abstract2017, 62nd Annual Conference on Magnetism and Magnetic Materials - MMM, 6/11/2017Publication Integration challenges of spin torque majority gatelogic
Oral presentation2016, IEDM Special MRAM PosterPublication Integration of interconnected magnetic tunnel junctions for spin torque majority gates
Proceedings paper2017, 49th International Conferece on Solid State Devices and Materials - SSDM, 19/09/2017Publication Interconnected magnetic tunnel junctions for spin-logic applications
Journal article2018, AIP Advances, (8) 5, p.55921Publication Interconnected MTJs as spintronic synapse
Meeting abstract2018, Joint European Magnetic Symposia. 9th JEMS, 3/09/2018, p.SP4.2.02Publication Interconnected MTJs driven by STT for spin-logic applications
Meeting abstract2017, 62nd Annual Conference on Magnetism and Magnetic Materials - MMM, 6/11/2017, p.AE-05Publication Inverter propagation and fan-out constraints for beyond-CMOS majority-based technologies
Proceedings paper2017, IEEE Computer Society Annual Symposium on VLSI - ISVLSI, 3/07/2017, p.164-169Publication Machine learning for fast characterization of magnetic logic devices
Proceedings paper2018, IEEE Electrical Design of Advanced Packaging and Systems Symposium - EDAPS, 16/12/2018, p.1-3Publication Magnetoelastic spin wave excitation: the role of the demagnetizing field
Proceedings paper2017, 62nd Annual Conference on Magnetism and Magnetic Materials, 6/11/2017Publication Magnetoelectric switching and spin wave generation
Meeting abstract2016, APS March Meeting, 14/03/2016, p.BAPS.2016.MAR.S6