Browsing by Author "Verplaetse, Peter"

A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits

A stochastic model for interconnection complexity based on Rent's rule

AQUASUN: adaptive window query processing in CAD applications for physical design and verfication

Generating synthetic benchmark circuits for evaluating CAD tools

Getting more out of Donath's hierarchical model for interconnect prediction

Karakterisatie van de interconnectietopologie van digitale schakelingen en toepassingen in digitaal ontwerp

On partitioning vs. placement rent properties

On Rent's rule for rectangular regions

On synthetic benchmark generation methods

Refinements of Rent's rule allowing accurate interconnect complexity modeling

Synthetic benchmark circuits for timing-driven physical design applications

The interconnect topology of digital circuits

Towards synthetic benchmark circuits for evaluating timing-driven CAD tools