Browsing by author "Tasselli, J."
Now showing items 1-5 of 5
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Dynamic compact thermal models for an ultra thin chip stacking technology
Palacin, J.; Salleras, M.; Marco., S.; Marty, A.; Tasselli, J.; Van Hoof, Rita; Beyne, Eric; Vendier, O.; Coella-Vera, A. (2002) -
Thermal management in a new ultra-thin chip stack technology
Pinel, S.; Tasselli, J.; Bailbe, J. P.; Marty, A.; Marco, S.; Morante, J. R.; Beyne, Eric; Van Hoof, Rita; Vendier, O.; Huan, M. (2001) -
Thermal modeling and management in ultrathin chip stack technology
Pinel, S.; Marty, A.; Tasselli, J.; Bailbe, J. P.; Beyne, Eric; Van Hoof, Rita; Marco, S.; Morante, J. R.; Vendier, O.; Huan, M. (2002) -
Ultra thin chip vertical integration technique
Pinel, S.; Tasselli, J.; Lepinois, F.; Marty, A.; Bailbe, J. P.; Beyne, Eric; Van Hoof, Rita; Marco, S.; Morante, J. R. (2001) -
Ultra thin electronics for space applications
Vendier, O.; Huan, M.; Drevofi, C.; Cazaux, J. L.; Beyne, Eric; Van Hoof, Rita; Marty, A.; Pinel, S.; Tasselli, J.; Marco, S.; Morante, J. R. (2001)