Browsing by author "Zheng, T."

Now showing items 1-3 of 3

    • Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications 

      Vandooren, Anne; Wu, Zhicheng; Khaled, Ahmad; Franco, Jacopo; Parvais, Bertrand; Li, W.; Witters, Liesbeth; Walke, Amey; Peng, Lan; Rassoul, Nouredine; Matagne, Philippe; Jamieson, Geraldine; Inoue, Fumihiro; Nguyen, B.Y.; Debruyn, Haroen; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Radisic, Dunja; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Besnard, G.; Schwarzenbach, W.; Gaudin, G.; Radu, Iuliana; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Ryckaert, Julien; Collaert, Nadine; Mocuta, Dan (2019)

    • First demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers 

      Vandooren, Anne; Franco, Jacopo; Wu, Zhicheng; Parvais, Bertrand; Li, Waikin; Walke, Amey; Peng, Lan; Deshpande, Paru; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Mannaert, Geert; Chan, BT; Ritzenthaler, Romain; Mitard, Jerome; Ragnarsson, Lars-Ake; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Mocuta, Dan; Ryckaert, Julien; Collaert, Nadine (2018)

    • Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling 

      Vandooren, Anne; Witters, Liesbeth; Franco, Jacopo; Mallik, Arindam; Parvais, Bertrand; Wu, Z.; Walke, Amey; Deshpande, Paru; Rosseel, Erik; Hikavyy, Andriy; Li, Waikin; Peng, L.; Rassoul, Nouredine; Jamieson, Geraldine; Inoue, Fumihiro; Verbinnen, Greet; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Waldron, Niamh; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018)