Browsing by author "Patel, Jash"
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Comparison between wet and dry silicon via reveal in 3D backside processing
Thomas, Dave; Hopkins, Janet; Ashraf, Huma; Patel, Jash; Ansell, Oliver; Jourdain, Anne; De Vos, Joeri; Miller, Andy; Beyne, Eric (2015) -
Demonstration of a collective hybrid die-to-wafer integration using glass carrier
Suhard, Samuel; Kennes, Koen; Bex, Pieter; Jourdain, Anne; Teugels, Lieve; Walsby, Edward; Bolton, Chris; Patel, Jash; Ashraf, Huma; Barnett, Richard; Fodor, Ferenc; Phommahaxay, Alain; La Tulipe, Douglas Charles; Beyer, Gerald; Beyne, Eric (2021) -
Extreme thinning of Si wafers for via-last and multi wafer stacking applications
Jourdain, Anne; De Vos, Joeri; Rassoul, Nouredine; Zahedmanesh, Houman; Miller, Andy; Beyer, Gerald; Beyne, Eric; Walsby, Edward; Patel, Jash; Ansell, Oliver; Ashraf, Huma; Thomas, Dave; Li, Shifang; Chang, Timothy; Hiebert, Stephen; Cross, Andrew; Stoerring, Moritz (2018) -
Extreme wafer thinning optimization for via-last applications
Jourdain, Anne; De Vos, Joeri; Inoue, Fumihiro; Rebibis, Kenneth June; Miller, Andy; Beyer, Gerald; Beyne, Eric; Walsby, Edward; Patel, Jash; Ansell, Oliver; Hopkins, Janet; Ashraf, Huma; Thomas, Dave (2016) -
Impact of backside processing on C-V characteristics of TSV capacitors in 3D stacked IC process flows
De Vos, Joeri; Stucchi, Michele; Jourdain, Anne; Beyne, Eric; Patel, Jash; Crook, Kath; Carruthers, Mark; Hopkins, Janet; Ashraf, Huma (2015)