Browsing by author "Ayala, Jose"
Now showing items 1-5 of 5
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Design space exploration of distributed loop buffer architectures with incompatible loop-nest organisation in embedded systems
Artes, Antonio; Fasthuber, Robert; Ayala, Jose; Raghavan, Praveen; Catthoor, Francky (2013) -
Energy impact in the design space exploration of loop buffer schemes in embedded systems
Artes, Antonio; Fasthuber, Robert; Ayala, Jose; Raghavan, Praveen; Catthoor, Francky (2013) -
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures
Atienza, David; Raghavan, Praveen; Ayala, Jose; De Micheli, G.; Catthoor, Francky; Verkest, Diederik; Lopez-Vallejo, Marisa (2008-01) -
Reduction of register file delay due to process variability in VLIW embedded processors
Raghavan, Praveen; Ayala, Jose; Atienza, David; Catthoor, Francky; De Micheli, Giovanni; Lopez Vallejo, Marisa (2007-05) -
Survey of low-energy techniques for instruction memory organisations in embedded systems
Artes, Antonio; Ayala, Jose; Huisken, Jos; Catthoor, Francky (2013)