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Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures
Publication:
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures
Date
2008-01
Journal article
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12071.pdf
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Basic data
APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Atienza, David
;
Raghavan, Praveen
;
Ayala, Jose
;
De Micheli, G.
;
Catthoor, Francky
;
Verkest, Diederik
;
Lopez-Vallejo, Marisa
Journal
Integration, the VLSI Journal
Abstract
Description
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2035
since deposited on 2021-10-17
Acq. date: 2025-10-25
Citations
Metrics
Views
2035
since deposited on 2021-10-17
Acq. date: 2025-10-25
Citations