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Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures

Date

2008-01
Journal article
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dc.contributor.authorAtienza, David
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorAyala, Jose
dc.contributor.authorDe Micheli, G.
dc.contributor.authorCatthoor, Francky
dc.contributor.authorVerkest, Diederik
dc.contributor.authorLopez-Vallejo, Marisa
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.date.accessioned2021-10-17T06:14:18Z
dc.date.available2021-10-17T06:14:18Z
dc.date.embargo9999-12-31
dc.date.issued2008-01
dc.identifier.issn0167-9260
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13321
dc.source.beginpage38
dc.source.endpage48
dc.source.issue1
dc.source.journalIntegration, the VLSI Journal
dc.source.volume21
dc.title

Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures

dc.typeJournal article
dspace.entity.typePublication
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