Now showing items 1-3 of 3

    • Addressing Key Challenges for SiGe-pFin Technologies: Fin Integrity, Low-D-IT Si-cap-free Gate Stack and Optimizing the Channel Strain 

      Arimura, Hiroaki; Capogreco, Elena; Wostyn, Kurt; Eneman, Geert; Ragnarsson, Lars-Ake; Brus, Stephan; Baudot, Sylvain; Peter, Antony; Schram, Tom; Favia, Paola; Richard, Olivier; Bender, Hugo; Mitard, Jerome; Horiguchi, Naoto (2020)
    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)
    • Probing the evolution of electrically active defects in doped ferroelectric HfO2 during wake-up and fatigue 

      Celano, Umberto; Chen, Yi-Hsuan; Minj, Albert; Banerjee, Kaustuv; Ronchi, Nicolo; McMitchell, Sean; Van Marcke, Patricia; Favia, Paola; Wu, T. L.; Kaczer, Ben; Van den Bosch, Geert; Van Houdt, Jan; van der Heide, Paul (2020)