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A memory hierarchical layer assigning and prefetching technique to overcome the memory performance/energy bottleneck

dc.contributor.authorDasygenis, Minas
dc.contributor.authorBrockmeyer, Erik
dc.contributor.authorDurinck, Bart
dc.contributor.authorCatthoor, Francky
dc.contributor.authorSoudris, Dimitrios
dc.contributor.authorThanailakis, Antonios
dc.date.accessioned2021-10-16T01:05:50Z
dc.date.available2021-10-16T01:05:50Z
dc.date.issued2005
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/10285
dc.sourceIIOimport
dc.titleA memory hierarchical layer assigning and prefetching technique to overcome the memory performance/energy bottleneck
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewno
dc.source.beginpage946
dc.source.endpage947
dc.source.conferenceProceedings of the Design, Automation and Test in Europe Conference and Exhibition - DATE
dc.source.conferencedate7/03/2005
dc.source.conferencelocationMünchen Germany
imec.availabilityPublished - imec


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