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dc.contributor.authorGonzalez, Mario
dc.contributor.authorLabie, Riet
dc.contributor.authorVandevelde, Bart
dc.contributor.authorBeyne, Eric
dc.date.accessioned2021-10-16T01:45:09Z
dc.date.available2021-10-16T01:45:09Z
dc.date.issued2005
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/10504
dc.sourceIIOimport
dc.titleInfluence of dielectric materials and via geometry on the thermomechanical behavior of silicon through interconnects
dc.typeProceedings paper
dc.contributor.imecauthorGonzalez, Mario
dc.contributor.imecauthorLabie, Riet
dc.contributor.imecauthorVandevelde, Bart
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecLabie, Riet::0000-0002-1401-1291
dc.contributor.orcidimecVandevelde, Bart::0000-0002-6753-6438
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.source.peerreviewno
dc.source.beginpage9
dc.source.endpage14
dc.source.conference10th Annual SMTA Pan Pacific Microelectronics Symposium & Exhibition
dc.source.conferencedate25/01/2005
dc.source.conferencelocationKauai, HI USA
imec.availabilityPublished - imec


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