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Scaling CMOS: finding the gate stack with the lowest leakage current

dc.contributor.authorKauerauf, Thomas
dc.contributor.authorGovoreanu, Bogdan
dc.contributor.authorDegraeve, Robin
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorMaes, Herman
dc.date.accessioned2021-10-16T02:28:16Z
dc.date.available2021-10-16T02:28:16Z
dc.date.issued2005-04
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/10682
dc.sourceIIOimport
dc.titleScaling CMOS: finding the gate stack with the lowest leakage current
dc.typeJournal article
dc.contributor.imecauthorGovoreanu, Bogdan
dc.contributor.imecauthorDegraeve, Robin
dc.contributor.imecauthorGroeseneken, Guido
dc.source.peerreviewno
dc.source.beginpage695
dc.source.endpage701
dc.source.journalSolid-State Electronics
dc.source.volume49
imec.availabilityPublished - imec


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