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A memory efficient programmable multi processor architecture for real time motion estimation type algorithms

dc.contributor.authorDe Greef, Eddy
dc.contributor.authorCatthoor, Francky
dc.contributor.authorDe Man, Hugo
dc.date.accessioned2021-09-29T12:40:32Z
dc.date.available2021-09-29T12:40:32Z
dc.date.issued1994
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/109
dc.sourceIIOimport
dc.titleA memory efficient programmable multi processor architecture for real time motion estimation type algorithms
dc.typeOral presentation
dc.contributor.imecauthorDe Greef, Eddy
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorDe Man, Hugo
dc.contributor.orcidimecDe Greef, Eddy::0000-0003-2404-1651
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewno
dc.source.conferenceInternational Workshop on Algorithms and Parallel VLSI Architectures
dc.source.conferencedate29/08/1994
dc.source.conferencelocationLeuven Belgium
imec.availabilityPublished - imec
imec.internalnotesTo be publ. 1995 (Elsevier). See C560


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