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FPGA design methodology for a wavelet-based scalable video decoder

dc.contributor.authorEeckhaut, H.
dc.contributor.authorDevos, H.
dc.contributor.authorFaes, P.
dc.contributor.authorChristiaens, M.
dc.contributor.authorStroobandt, Dirk
dc.date.accessioned2021-10-16T15:58:56Z
dc.date.available2021-10-16T15:58:56Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12114
dc.sourceIIOimport
dc.titleFPGA design methodology for a wavelet-based scalable video decoder
dc.typeProceedings paper
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage169
dc.source.endpage178
dc.source.conferenceEmbedded Computer Systems: Architectures, Modeling, and Simulation. 7th Int. Workshop. SAMOS
dc.source.conferencedate16/07/2007
dc.source.conferencelocationSamos Greece
imec.availabilityPublished - open access
imec.internalnotesLecture Notes on Computer Science; Vol. 4599


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