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Performance evaluation of large reconfigurable interconnects for multiprocessor systems

dc.contributor.authorHeirman, W.
dc.contributor.authorArtundo, I.
dc.contributor.authorDambre, Joni
dc.contributor.authorDebaes, C.
dc.contributor.authorDoan, T.P.
dc.contributor.authorViet, K.B.
dc.contributor.authorThienpont, H.
dc.contributor.authorVan Campenhout, Jan
dc.date.accessioned2021-10-16T16:32:17Z
dc.date.available2021-10-16T16:32:17Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12262
dc.sourceIIOimport
dc.titlePerformance evaluation of large reconfigurable interconnects for multiprocessor systems
dc.typeProceedings paper
dc.contributor.imecauthorDambre, Joni
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage145
dc.source.endpage150
dc.source.conferenceInternational Symposium on Electrical - Electronics Engineering - ISEE
dc.source.conferencedate24/10/2007
dc.source.conferencelocationHo Chi Min City Vietnam
imec.availabilityPublished - open access


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