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Using a linear sectioned bus and communication processor to reduce energy costs in synchronous on-chip communication

dc.contributor.authorHeyrman, Kris
dc.contributor.authorPapanikolaou, Antonis
dc.contributor.authorCatthoor, Francky
dc.contributor.authorVeelaert, Peter
dc.contributor.authorPhilips, Wilfried
dc.date.accessioned2021-10-16T16:39:56Z
dc.date.available2021-10-16T16:39:56Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12295
dc.sourceIIOimport
dc.titleUsing a linear sectioned bus and communication processor to reduce energy costs in synchronous on-chip communication
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorVeelaert, Peter
dc.contributor.imecauthorPhilips, Wilfried
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.contributor.orcidimecPhilips, Wilfried::0000-0003-4456-4353
dc.source.peerreviewno
dc.source.beginpage117
dc.source.endpage120
dc.source.conferenceInternational Symposium on System-on-Chip - SoC
dc.source.conferencedate19/11/2007
dc.source.conferencelocationTampere Finland
imec.availabilityPublished - imec


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