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Determining weak Fermi-level pinning in MOS devices by coductance and capacitance analysis and application to GaAs MOS devices

dc.contributor.authorMartens, Koen
dc.contributor.authorWang, Wenfei
dc.contributor.authordimoulas, A.
dc.contributor.authorBorghs, Gustaaf
dc.contributor.authorMeuris, Marc
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorMaes, Herman
dc.date.accessioned2021-10-16T17:52:20Z
dc.date.available2021-10-16T17:52:20Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12561
dc.sourceIIOimport
dc.titleDetermining weak Fermi-level pinning in MOS devices by coductance and capacitance analysis and application to GaAs MOS devices
dc.typeJournal article
dc.contributor.imecauthorMartens, Koen
dc.contributor.imecauthorWang, Wenfei
dc.contributor.imecauthorBorghs, Gustaaf
dc.contributor.imecauthorMeuris, Marc
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecMartens, Koen::0000-0001-7135-5536
dc.contributor.orcidimecMeuris, Marc::0000-0002-9580-6810
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage1101
dc.source.endpage1108
dc.source.journalSolid-State Electronics
dc.source.issue8
dc.source.volume51
imec.availabilityPublished - open access


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