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dc.contributor.authorPourtois, Geoffrey
dc.contributor.authorHoussa, Michel
dc.contributor.authorDe Jaeger, Brice
dc.contributor.authorLeys, Frederik
dc.contributor.authorKaczer, Ben
dc.contributor.authorMartens, Koen
dc.contributor.authorCaymax, Matty
dc.contributor.authorMeuris, Marc
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorHeyns, Marc
dc.date.accessioned2021-10-16T18:48:55Z
dc.date.available2021-10-16T18:48:55Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12739
dc.sourceIIOimport
dc.titleA step towards a better understanding of silicon passivated (100) Ge p-channel
dc.typeProceedings paper
dc.contributor.imecauthorPourtois, Geoffrey
dc.contributor.imecauthorHoussa, Michel
dc.contributor.imecauthorDe Jaeger, Brice
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorMartens, Koen
dc.contributor.imecauthorCaymax, Matty
dc.contributor.imecauthorMeuris, Marc
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorHeyns, Marc
dc.contributor.orcidimecPourtois, Geoffrey::0000-0003-2597-8534
dc.contributor.orcidimecHoussa, Michel::0000-0003-1844-3515
dc.contributor.orcidimecDe Jaeger, Brice::0000-0001-8804-7556
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecMartens, Koen::0000-0001-7135-5536
dc.contributor.orcidimecMeuris, Marc::0000-0002-9580-6810
dc.source.peerreviewno
dc.source.beginpage53
dc.source.endpage63
dc.source.conferenceAdvanced Gate Stack , Source/Drain and Channel Engineering for Si-Based CMOS 3
dc.source.conferencedate6/05/2007
dc.source.conferencelocationChicago, IL USA
imec.availabilityPublished - imec
imec.internalnotesECS Trans.; Vol. 6, nr.1


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