dc.contributor.author | Pourtois, Geoffrey | |
dc.contributor.author | Houssa, Michel | |
dc.contributor.author | De Jaeger, Brice | |
dc.contributor.author | Leys, Frederik | |
dc.contributor.author | Kaczer, Ben | |
dc.contributor.author | Martens, Koen | |
dc.contributor.author | Caymax, Matty | |
dc.contributor.author | Meuris, Marc | |
dc.contributor.author | Groeseneken, Guido | |
dc.contributor.author | Heyns, Marc | |
dc.date.accessioned | 2021-10-16T18:48:55Z | |
dc.date.available | 2021-10-16T18:48:55Z | |
dc.date.issued | 2007 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/12739 | |
dc.source | IIOimport | |
dc.title | A step towards a better understanding of silicon passivated (100) Ge p-channel | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Pourtois, Geoffrey | |
dc.contributor.imecauthor | Houssa, Michel | |
dc.contributor.imecauthor | De Jaeger, Brice | |
dc.contributor.imecauthor | Kaczer, Ben | |
dc.contributor.imecauthor | Martens, Koen | |
dc.contributor.imecauthor | Caymax, Matty | |
dc.contributor.imecauthor | Meuris, Marc | |
dc.contributor.imecauthor | Groeseneken, Guido | |
dc.contributor.imecauthor | Heyns, Marc | |
dc.contributor.orcidimec | Pourtois, Geoffrey::0000-0003-2597-8534 | |
dc.contributor.orcidimec | Houssa, Michel::0000-0003-1844-3515 | |
dc.contributor.orcidimec | De Jaeger, Brice::0000-0001-8804-7556 | |
dc.contributor.orcidimec | Kaczer, Ben::0000-0002-1484-4007 | |
dc.contributor.orcidimec | Martens, Koen::0000-0001-7135-5536 | |
dc.contributor.orcidimec | Meuris, Marc::0000-0002-9580-6810 | |
dc.source.peerreview | no | |
dc.source.beginpage | 53 | |
dc.source.endpage | 63 | |
dc.source.conference | Advanced Gate Stack , Source/Drain and Channel Engineering for Si-Based CMOS 3 | |
dc.source.conferencedate | 6/05/2007 | |
dc.source.conferencelocation | Chicago, IL USA | |
imec.availability | Published - imec | |
imec.internalnotes | ECS Trans.; Vol. 6, nr.1 | |