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Reduction of register file delay due to process variability in VLIW embedded processors

dc.contributor.authorRaghavan, Praveen
dc.contributor.authorAyala, Jose
dc.contributor.authorAtienza, David
dc.contributor.authorCatthoor, Francky
dc.contributor.authorDe Micheli, Giovanni
dc.contributor.authorLopez Vallejo, Marisa
dc.date.accessioned2021-10-16T18:52:58Z
dc.date.available2021-10-16T18:52:58Z
dc.date.issued2007-05
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12751
dc.sourceIIOimport
dc.titleReduction of register file delay due to process variability in VLIW embedded processors
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewyes
dc.source.beginpage121
dc.source.endpage124
dc.source.conferenceIEEE International Symposium on Circuits and Systems - ISCAS
dc.source.conferencedate27/05/2007
dc.source.conferencelocationNew Orleans, LO USA
imec.availabilityPublished - imec


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