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Substrate noise isolation experiments in a 0.18μm 1P6M triple-well CMOS process on a lightly doped substrate

dc.contributor.authorVinella, Rosa Maria
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorSoens, Charlotte
dc.contributor.authorRizzi, Maria
dc.contributor.authorCastagnolo, Beniamino
dc.date.accessioned2021-10-16T21:29:37Z
dc.date.available2021-10-16T21:29:37Z
dc.date.issued2007-05
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13190
dc.sourceIIOimport
dc.titleSubstrate noise isolation experiments in a 0.18μm 1P6M triple-well CMOS process on a lightly doped substrate
dc.typeProceedings paper
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorSoens, Charlotte
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.source.peerreviewyes
dc.source.conferenceProceedings IEEE Instrumentation and Measurement Conference - IMTC
dc.source.conferencedate1/05/2007
dc.source.conferencelocationWarsaw Poland
imec.availabilityPublished - imec


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