dc.contributor.author | von Arnim, Klaus | |
dc.contributor.author | Augendre, Emmanuel | |
dc.contributor.author | Pacha, C. | |
dc.contributor.author | Schulz, Thomas | |
dc.contributor.author | San, Kemal Tamer | |
dc.contributor.author | Bauer, F. | |
dc.contributor.author | Nackaerts, Axel | |
dc.contributor.author | Rooyackers, Rita | |
dc.contributor.author | Vandeweyer, Tom | |
dc.contributor.author | Degroote, Bart | |
dc.contributor.author | Collaert, Nadine | |
dc.contributor.author | Dixit, Abhisek | |
dc.contributor.author | Singanamalla, Raghunath | |
dc.contributor.author | Xiong, W. | |
dc.contributor.author | Marshall, A. | |
dc.contributor.author | Cleavelin, C.R. | |
dc.contributor.author | Schrüfer, K. | |
dc.contributor.author | Jurczak, Gosia | |
dc.date.accessioned | 2021-10-16T21:33:58Z | |
dc.date.available | 2021-10-16T21:33:58Z | |
dc.date.issued | 2007 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/13200 | |
dc.source | IIOimport | |
dc.title | A low-power multi-gate FET CMOS technology with 13.9ps inverter delay, large-scale integrated high performance digital circuits and SRAM | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Vandeweyer, Tom | |
dc.contributor.imecauthor | Collaert, Nadine | |
dc.contributor.imecauthor | Jurczak, Gosia | |
dc.contributor.orcidimec | Collaert, Nadine::0000-0002-8062-3165 | |
dc.source.peerreview | no | |
dc.source.beginpage | 106 | |
dc.source.endpage | 107 | |
dc.source.conference | Symposium on VLSI Technology. Digest of Technical Papers | |
dc.source.conferencedate | 14/06/2007 | |
dc.source.conferencelocation | Kyoto Japan | |
imec.availability | Published - imec | |