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dc.contributor.authorYu, HongYu
dc.contributor.authorSinganamalla, Raghunath
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorChang, Vincent
dc.contributor.authorCho, Hag-Ju
dc.contributor.authorMitsuhashi, Riichirou
dc.contributor.authorAdelmann, Christoph
dc.contributor.authorVan Elshocht, Sven
dc.contributor.authorLehnen, Peer
dc.contributor.authorChang, Shou-Zen
dc.contributor.authorYin, K.M.
dc.contributor.authorSchram, Tom
dc.contributor.authorKubicek, Stefan
dc.contributor.authorDe Gendt, Stefan
dc.contributor.authorAbsil, Philippe
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorBiesemans, Serge
dc.date.accessioned2021-10-16T21:55:37Z
dc.date.available2021-10-16T21:55:37Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13253
dc.sourceIIOimport
dc.titleDemonstration of metal-gated low Vt n-MOSFETs using a Poly-Si/TaN/Dy2O3/SiON gate stack with a scaled EOT value
dc.typeJournal article
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorAdelmann, Christoph
dc.contributor.imecauthorVan Elshocht, Sven
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorKubicek, Stefan
dc.contributor.imecauthorDe Gendt, Stefan
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.imecauthorBiesemans, Serge
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecAdelmann, Christoph::0000-0002-4831-3159
dc.contributor.orcidimecVan Elshocht, Sven::0000-0002-6512-1909
dc.contributor.orcidimecDe Gendt, Stefan::0000-0003-3775-3578
dc.source.peerreviewno
dc.source.beginpage656
dc.source.endpage658
dc.source.journalIEEE Electron Device Letters
dc.source.issue7
dc.source.volume28
imec.availabilityPublished - imec


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