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Challenges of etching new gate materials for Si device below 45nm node

dc.contributor.authorBoullart, Werner
dc.date.accessioned2021-10-17T06:21:57Z
dc.date.available2021-10-17T06:21:57Z
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13434
dc.sourceIIOimport
dc.titleChallenges of etching new gate materials for Si device below 45nm node
dc.typeOral presentation
dc.contributor.imecauthorBoullart, Werner
dc.contributor.orcidimecBoullart, Werner::0000-0001-7614-2097
dc.source.peerreviewno
dc.source.conference1st International Conference on Micorelectronics and Plasma technology - ICMAP
dc.source.conferencedate18/08/2008
dc.source.conferencelocationJeju Korea
imec.availabilityPublished - imec


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