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Improvement of TANOS NAND Flash performance by the optimazation of a sealing layer

dc.contributor.authorBreuil, Laurent
dc.contributor.authorFurnemont, Arnaud
dc.contributor.authorRothschild, Aude
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorCacciato, Antonio
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-17T06:23:33Z
dc.date.available2021-10-17T06:23:33Z
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13450
dc.sourceIIOimport
dc.titleImprovement of TANOS NAND Flash performance by the optimazation of a sealing layer
dc.typeProceedings paper
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorFurnemont, Arnaud
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecFurnemont, Arnaud::0000-0002-6378-1030
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage126
dc.source.endpage127
dc.source.conferenceJoint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design - NVSMW-ICMTD
dc.source.conferencedate19/05/2008
dc.source.conferencelocationNice France
imec.availabilityPublished - open access


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